SESC: cycle accurate architectural simulator

News

Classes Using SESC

  • CMPE202 (Computer Architecture) at University of California, Santa Cruz.

Published Papers with SESC

  • Cherry: Checkpointed Early Resource Recycling in Out-of-order Microprocessors, Jose F. Martinez (Cornell University), Jose Renau (University of Illinois), Michael Huang (University of Rochester), Milos Prvulovic, and Josep Torrellas (University of Illinois), 35th International Symposium on Microarchitecture (MICRO), November 2002.
  • Programming a Parallel Intelligent Memory System, Basilio B. Fraguela, Jose Renau, Paul Feautrier, David Padua, and Josep Torrellas, Symposium on Principles and Practice of Parallel Programming (PPoPP), June 2003.
  • AccMon: Automatically Detecting Memory-Related Bugs via Program Counter-Based Invariants Pin Zhou, Wei Liu, Fei Long, Shan Lu, Feng Qin, Yuanyuan Zhou, Sam Midkiff and Josep Torrellas, 37th International Symposium on Microarchitecture (MICRO), December 2004.
  • iWatcher: Efficient Architectural Support for Software Debugging Pin Zhou, Feng Qin, Wei Liu, Yuanyuan Zhou and Josep Torrellas, 31th Annual International Symposium on Computer Architecture (ISCA), June 2004.
  • Checkpointed early load retirement, N. Kirman, M. Kirman, M. Chaudhuri, and J.F. Martínez. In Intl. Symp. on High-Performance Computer Architecture (MICRO), San Francisco, CA, February 2005
  • Thread-Level Speculation on a CMP Can Be Energy Efficient Jose Renau, Karin Strauss, Luis Ceze, Wei Liu, Smruti Sarangi, James Tuck, and Josep Torrellas. International Conference on Supercomputing (ICS), June 2005.
  • Tasking with Out-of-Order Spawn in TLS Chip Multiprocessors: Microarchitecture and Compilation Jose Renau, James Tuck, Wei Liu, Luis Ceze, Karin Strauss, and Josep Torrellas. International Conference on Supercomputing (ICS), June 2005.
  • POSH: A Profiler-Enhanced TLS Compiler that Leverages Program Structure, Wei Liu, James Tuck, Luis Ceze, Karin Strauss, Jose Renau, and Josep Torrellas. The Second Watson Conference on Interaction between Architecture, Circuits, and Compilers (P=AC2), September 2005.
  • ReSlice: Selective Re-Execution of Long-Retired Misspeculated Instructions Using Forward Slicing, Smruti R. Sarangi, Wei Liu, Josep Torrellas, and Yuanyuan Zhou, 38th International Symposium on Microarchitecture (MICRO), November 2005.
  • Cherry-MP: Correctly integrating checkpointed early resource recycling in chip multiprocessors, M. Kirman, N. Kirman, and J.F. Martínez. In Intl. Symp. on Microarchitecture (MICRO), Barcelona, Spain, November 2005